vLLM PR adding native HIP W4A16 kernel was merged

<table> <tr><td> <a href="https://www.reddit.com/r/LocalLLaMA/comments/1x5skta/cuda_hip_gdn_chunked_kernel_by_am17an_pull/"> <img alt="cuda, hip: GDN chunked kernel by am17an ·

<!-- SC_OFF --><div class="md"><p>PR #22673 (commit 4f13cb7) landed MTP speculative decoding in mainline llama.cpp on May 16. I tested it on two separate rigs.</p> <p>Qwen3.6 27B,

<table> <tr><td> <a href="https://www.reddit.com/r/LocalLLaMA/comments/1svdjfa/cuda_reduce_mmq_streamk_overhead_by/"> <img alt="CUDA: reduce MMQ stream-k overhead by

<table> <tr><td> <a href="https://www.reddit.com/r/LocalLLaMA/comments/1s9lge6/llama_rotate_activations_for_better_quantization/"> <img alt="llama : rotate activations for better

<table> <tr><td> <a href="https://www.reddit.com/r/LocalLLaMA/comments/1s71d3f/optimize_moe_gemv_kernel_for_bs_1_by_gaugargnv/"> <img alt="Optimize MOE GEMV kernel for BS &gt; 1.

<table> <tr><td> <a href="https://www.reddit.com/r/LocalLLaMA/comments/1t67lvx/feat_add_mimo_v25_model_support_by_aessedai_pull/"> <img alt="feat: Add Mimo v2.5 model support by

<!-- SC_OFF --><div class="md"><p>b9095 finally makes -sm tensor work on dual consumer Blackwell PCIe GPUs without NCCL</p> <p>If youre on dual Blackwell gpus this look like it

<!-- SC_OFF --><div class="md"><p>So i recently updated LMstudio after a long pause and updated my llama.cpp runtimes too.. i was shocked.. i thought maybe something like