[P] Prompt optimization for analog circuit placement — 97% of expert quality, ze

arXiv:2608.13767v1 Announce Type: new Abstract: Analog IC layout design remains a labor-intensive iterative process dominated by simulation-driven refinement. Although end-to-end

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<!-- SC_OFF --><div class="md"><p>Analog in-memory compute is getting attention again as a way around the energy cost of moving weights between memory and compute. The recurring

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arXiv:2609.21263v1 Announce Type: new Abstract: Automated macro placement remains a fundamental challenge in VLSI physical design. Despite decades of research, existing approaches

arXiv:2608.26113v1 Announce Type: new Abstract: We present PICasso, an AI-assisted framework for automated synthesis, verification, and optimization of photonic integrated